The present invention concerns a high power buffer with increased current stability which is used to buffer output for an integrated circuit.
An output buffer stage for an integrated circuit needs to source and sink current into a large capacitive load in order to change voltage at an output pad of the integrated circuit.
In complementary metal oxide semiconductor (CMOS) devices, output voltage on an output pad is pulled up by electrically connecting the output pad through a first transistor to a power voltage (V.sub.dd). Output voltage on the output pad is pulled down by electrically connecting the output pad through a second transistor to a source (or ground) voltage (V.sub.ss).
In order to change the output voltage on an output pad, a relatively large amount of current is required to charge or discharge the capacitive load. For example, when the voltage transition on the output pad is from low to high, the output buffer stage acts as a current source to provide current to charge the capacitive load. When the voltage transition on the output pad is from high to low, the output buffer stage acts a current sink to discharge the capacitive load.
The large increase of current flow during a voltage transition time effects the power voltage (V.sub.dd) and/or the source voltage (V.sub.ss) because of inductances within the power and ground lines. The result can be a voltage spike in the power voltage during a low to high voltage transition, and a voltage spike in the source voltage during a high to low voltage transition.
When the ground line and power line for an output buffer stage are shared by other circuits within an integrated circuit, or even other output buffer stages, the voltage spikes caused by transitions can cause erroneous data transitions or reduce performance levels. Several types of circuits have been used in the prior art to lessen the severity of voltage variations in the power voltage and source voltage due to transitions on an output.
For example, for an output stage where a first transistor is connected between an output pad and the power voltage, and where a second transistor is connected between the output pad and the source voltage, circuitry may be added to each output buffer stage which assure that both the first transistor and the second transistor will not be simultaneously turned on during a transition. Such circuitry eliminates "crowbar" current which can flow directly from the power voltage to the source voltage during a transition. The circuitry may be implemented, for example, using digital control circuitry. See for example, U.S. Pat. No. 4,825,102, issued to Toshiyuki Iwasawa et al. for MOS FET DRIVE CIRCUIT PROVIDING PROTECTION AGAINST TRANSIENT VOLTAGE BREAKDOWN. Alternately, the circuitry may be implemented using inverters with different switching voltage thresholds. See for example, U.S. Pat. No. 4,827,159, issued to Masayuki Naganuma for HIGH POWER BUFFER CIRCUIT WITH LOW NOISE.
In addition, the severity of voltage variations in the power voltage and source voltage due to transitions on an output can be lessened by using feedback to control the current available to charge up the gates of transistors used in the voltage driver of the output stage. See for example, U.S. Pat. No. 4,825,099, issued to Steven K. Barton for FEEDBACK-CONTROLLED CURRENT OUTPUT DRIVER HAVING REDUCED CURRENT SURGE.
The severity of voltage variations in the power voltage and source voltage due to transitions on an output may also be lessened by using control devices to reduce the initial load charge up but increasing the load charge up thereafter. See for example, U.S. Pat. No. 4,800,298 issued to Ruey J. Yu et al for OUTPUT BUFFER FOR IMPROVING DI/DT. Similarly, control circuitry or a source follower may be added to the output buffer stage so that rather than a single large current surge at a transition, many smaller current surges occur at different times. See for example, U.S. Pat. No. 4,829,199 issued to James S. Prater for DRIVER CIRCUIT PROVIDING LOAD AND TIME ADAPTIVE CURRENT or U.S. Pat. No. 4,825,101 issued to Donald M. Walters Jr. for FULL-LEVEL, FAST CMOS OUTPUT BUFFER.